vishay siliconix dg2012 document number: 72176 s-70852-rev. b, 30-apr-07 www.vishay.com 1 low-voltage single spdt analog switch features ? low voltage operation (1.8 v to 5.5 v) ? low on-resistance - r ds(on) : 1 typ. ? fast switching - t on : 17 ns, t off : 13 ns ? low leakage ? ttl/cmos compatible ? 6-pin sc-70 package benefits ? reduced power consumption ? simple logic interface ? high accuracy ? reduce board space applications ? cellular phones ? communication systems ? portable test equipment ? battery oper ated systems ? sample and hold circuits description the dg2012 is a single-pole/double-throw monolithic cmos analog switch designed for high performance switching of analog signals. combining low power, high speed (t on : 17 ns, t off : 13 ns), low on-resistance (r ds(on) : 1 ) and small physical size (sc70), the dg2012 is ideal for portable and battery powered applications requiring high performance and efficient use of board space. the dg2012 is built on vishay siliconix?s low voltage submicron cmos process. an epitaxial layer prevents latchup. break-before -make is guaranteed for dg2012. each switch conducts equally well in both directions when on, and blocks up to the power supply level when off. functional block diagram and pin configuration * pb containing terminations are not rohs compliant, exemptions may apply no (source 1 ) com nc (source 2 ) 1 2 3 6 5 top view in v+ gnd 4 sc-70 device marking: e7xx truth table logic nc no 0onoff 1offon ordering information temp range package part number - 40 to 85 c sc70-6 dg2012dl-t1 dg2012dl-t1-e3 available pb-free rohs* compliant
www.vishay.com 2 document number: 72176 s-70852-rev. b, 30-apr-07 vishay siliconix dg2012 notes: a. signals on nc, no, or com or in exceeding v+ will be clamped by inte rnal diodes. limit forward diode current to maximum curr ent ratings. b. all leads welded or soldered to pc board. c. derate 3.1 mw/c above 70 c. absolute maximum ratings parameter limit unit referenced v+ to gnd - 0.3 to + 6 v in, com, nc, no a - 0.3 to (v+ + 0.3) continuous current (no, nc and com pins) 100 ma peak current (pulsed at 1 ms, 10 % duty cycle) 300 storage temperature (d suffix) - 65 to 150 c power dissipation (packages) b 6-pin so70 c 250 mw specifications (v+ = 2.0 v) parameter symbol test conditions otherwise unless specified v+ = 2.0 v, 10 %, v in = 0.4 or 1.6 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc v com full 0 v+ v on-resistance r on v+ = 1.8 v, v com = 0.2 v/0.9 v i no , i nc = 10 ma room full d 2.7 2.7 5.3 5.3 r on flatness d r on flatness v+ = 1.8 v, v com = 0 to v+, i no , i nc = 10 ma room 3 r on match d r on room 0.25 switch off leakage current f i no(off) i nc(off) v+ = 2.2 v v no , v nc = 0.5 v/1.5 v, v com = 1.5 v/0.5 v room full - 0.5 - 5.0 0.5 5.0 na i com(off) room full d - 0.5 - 5.0 0.5 5.0 channel-on leakage current f i com(on) v+ = 2.2 v, v no , v nc = v com = 0.5 v/1.5 v room full d - 0.5 - 5.0 0.5 5.0 digital control input high voltage v inh full 1.6 v input low voltage v inl full 0.4 input capacitance d c in full 3 pf input current f i inl or i inh v in = 0 or v+ full - 1 1 a dynamic characteristics tu r n - o n t i m e d t on v no or v nc = 1.5 v, r l = 300 , c l = 35 pf figures 1 and 2 room full d 43 63 65 ns turn-off time d t off room full d 23 45 46 break-before-make time d t d room 2 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 , figure 3 room 7 pc off-isolation d oirr r l = 50 , c l = 5 pf, f = 1 mhz room - 63 db crosstalk d x ta l k room - 64 n o , n c off capacitance d c no(off) c nc(off) v in = 0 or v+, f = 1 mhz room 22 pf channel-on capacitance d c on room 58
document number: 72176 s-70852-rev. b, 30-apr-07 www.vishay.com 3 vishay siliconix dg2012 specifications (v+ = 3.0 v) parameter symbol test conditions otherwise unless specified v+ = 3 v, 10 %, v in = 0.6 or 2.0 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc v com full 0 v+ v on-resistance r on v+ = 2.7 v, v com = 0.2 v/1.5 v, i no i nc = 10 ma room full 1.4 1.6 2.1 2.3 r on flatness r on flatness v+ = 2.7 v, v com = 0 to v+, i no , i nc = 10 ma room 0.85 r on matchflat r on room 0.25 switch off leakage current f i no(off) i nc(off) v+ = 3.3 v v no , v nc = 1 v/3 v, v com = 3 v/1 v room full - 0.5 - 5.0 0.5 5.0 na i com(off) room full - 0.5 - 5.0 0.5 5.0 channel-on leakage current f i com(on) v+ = 3.3 v, v no , v nc = v com = 1 v/3 v room full - 0.5 - 5.0 0.5 5.0 digital control input high voltage v inh full 2 v input low voltage v inl full 0.6 input capacitance d c in full 3 pf input current f i inl or i inh v in = 0 or v+ full - 1 1 a dynamic characteristics tu r n - o n t i m e t on v no or v nc = 2.0 v, r l = 300 , c l = 35 pf figures 1 and 2 room full 27 47 48 ns turn-off time t off room full 17 37 38 break-before-make time t d room 1 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 , figure 3 room 10 pc off-isolation d oirr r l = 50 , c l = 5 pf, f = 1 mhz room - 63 db crosstalk d x ta l k room - 64 no, nc off capacitance d c no(off) c nc(off) v in = 0 or v+, f = 1 mhz room 21 pf channel-on capacitance d c on room 57 power supply power supply range v+ 1.8 5.5 v power supply current i+ v in = 0 or v+ 0.01 1.0 a
www.vishay.com 4 document number: 72176 s-70852-rev. b, 30-apr-07 vishay siliconix dg2012 notes: a. room = 25 c, full = as determined by the operating suffix. b. the algebraic convention whereby the most negative value is a minimum and the most pos itive a maximum, is used in this data sheet. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. guarantee by design, nor s ubjected to production test. e. v in = input voltage to perform proper function. f. guaranteed by 5 v leakage testing, not production tested. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specifications (v+ = 5.0 v) parameter symbol test conditions otherwise unless specified v+ = 5 v, 10 %, v in = 0.8 or 2.4 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc v com full 0 v+ v on-resistance r on v+ = 4.5 v, v com = 0.5 v/2.5 v i no , i nc = 10 ma room full 1.0 1.2 1.8 1.9 r on flatness d r on flatness v+ = 4.5 v, v com = 0 to v+, i no , i nc = 10 ma room 0.55 r on match d r on room 0.25 switch off leakage current i no(off) i nc(off) v+ = 5.0 v v no , v nc = 0.5 v/4.5 v, v com = 4.5 v/0.5 v room full - 0.5 - 5.0 0.5 5.0 na i com(off) room full - 0.5 - 5.0 0.5 5.0 channel-on leakage current i com(on) v+ = 5.0 v, v no , v nc = v com = 0.5 v/4.5 v room full - 0.5 - 5.0 0.5 5.0 digital control input high voltage v inh full 2.4 v input low voltage v inl full 0.8 input capacitance c in full 3 pf input current i inl or i inh v in = 0 or v+ full - 1 1 a dynamic characteristics tu r n - o n t i m e d t on v no or v nc = 3 v, r l = 300 , c l = 35 pf figures 1 and 2 room full 17 38 39 ns turn-off time d t off room full 13 32 33 break-before-make time d t d room 1 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 , figure 3 room 20 pc off-isolation d oirr r l = 50 , c l = 5 pf, f = 1 mhz room - 63 db crosstalk d x ta l k room - 64 source-off capacitance d c no(off) c nc(off) v in = 0 or v+, f = 1 mhz room 20 pf channel-on capacitance d c on room 56
document number: 72176 s-70852-rev. b, 30-apr-07 www.vishay.com 5 vishay siliconix dg2012 typical characteristics 25 c, unless otherwise noted r on vs. v com and supply voltage supply current vs. temperature leakage current vs. temperature - on-resistance ( ) r on 0 1 2 3 4 5 6 012345 v com - analog voltage (v) v+ = 1.8 v v+ = 2 v v+ = 3 v v+ = 5 v i s = 10 ma - 60 - 40 - 20 0 20 40 60 80 100 10000 1000 1 temperature ( c) i+ - supply current (na) 10 v+ = 5 v v in = 0 v 100 - 60 - 40 - 20 0 20 40 60 80 100 100 0.1 10 leakage current (pa) temperature ( c) 1000 v+ = 5 v 1 i no(off) /i nc(off) i com(on) i com(off) r on vs. analog voltage and temperature supply current vs. input switching frequency leakage vs. analog voltage 0 1 2 3 4 5 6 012345 - on-resistance ( ) r on v com - analog voltage (v) v+ = 2 v v+ = 5 v 85 c - 40 c 25 c 85 c 25 c i s = 10 ma v+ = 3 v 85 c - 40 c 25 c - 40 c 10 m input switching frequency (hz) 10 k 1 m 10 m 100 k 1 k 100 10 i+ - supply current (a) 100 p 1 m 100 10 1 10 n 100 n v+ = 3 v 1 n - 250 - 200 - 150 - 100 - 50 0 50 100 150 200 250 012345 v com , v no , v nc - analog voltage leakage current (pa) v+ = 5 v t = 25 c i no(off) /i nc(off) i com(on) i com(off)
www.vishay.com 6 document number: 72176 s-70852-rev. b, 30-apr-07 vishay siliconix dg2012 typical characteristics 25 c, unless otherwise noted switching time vs. temperature and supply voltage switching threshold vs. supply voltage 0 5 10 15 20 25 30 35 40 45 50 - 60 - 40 - 20 0 20 40 60 80 100 t on v+ = 2 v temperature ( c) t on ,t off - switching time (ns) t on v+ = 3 v t on v+ = 5 v t off v+ = 2 v t off v+ = 3 v t off v+ = 5 v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 01234567 v+ - su pp l y volta g e ( v ) v t - switching threshold (v) insertion loss, off-isolation crosstalk vs. frequency charge injection vs. analog voltage - 90 - 20 10 loss, oirr, x fre q uenc y ( hz ) - 10 0 10 m 1 g 100 m 1 m 100 k - 30 - 40 - 50 - 60 - 70 - 80 talk (db) v+ = 5 v r l = 50 loss oirr x talk - 30 - 20 - 10 0 10 20 30 0123456 v com - analog voltage (v) q - charge injection (pc) v+ = 2 v v+ = 3 v v+ = 5 v
document number: 72176 s-70852-rev. b, 30-apr-07 www.vishay.com 7 vishay siliconix dg2012 test circuits figure 1. switching time switch input c l (includes fixture and stray capacitance) v+ in no or nc c l 35 pf com logic input r l 300 v out gnd v+ 50 % 0 v logic input switch output t on t off logic "1" = switch on logic input waveforms inverted for switches that have the opposite logic sense. switch output 0.9 x v ou t t r < 5 ns t f < 5 ns v inh v inl v out = v com r l r l + r on figure 2. break-before-make interval c l (includes fixture and stray capacitance) nc v no no v nc 0 v logic input switch output v o v nc = v no t r < 5 ns t f < 5 ns 90 % t d t d in com v+ gnd v+ c l 35 pf v o r l 300 v inh v inl figure 3. charge injection off on on in v out v out q = v out x c l c l = 1 nf com r gen v out nc or no v in = 0 - v+ in v gen gnd v+ v+ in depends on switch configuration: input polarity determined b y sense of switch. +
www.vishay.com 8 document number: 72176 s-70852-rev. b, 30-apr-07 vishay siliconix dg2012 test circuits vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon tech- nology and package reliability represent a com posite of all qualified locations. for related documents such as package/tape dra wings, part marking, and reliability data, see http://www.vishay.com/ppg?72176 . figure 4. off-isolation in gnd nc or no 0 v, 2.4 v 10 nf com off isolation = 20 log v com v no/ nc r l analyzer v+ v+ figure 5. channel off/on capacitance nc or no f = 1 mhz in com gnd 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent 10 nf v+ v+
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.
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